A Unified Clock-Gated Error Correction Scheme With Three-Phase Latch-Based Pipeline for Energy-Efficient Wide Supply Voltage Range Router

Bingxi Pei, Shi Xu, Zhang Luo, Qin Wang 0009, Mingche Lai, Weifeng He. A Unified Clock-Gated Error Correction Scheme With Three-Phase Latch-Based Pipeline for Energy-Efficient Wide Supply Voltage Range Router. IEEE Trans. Circuits Syst. II Express Briefs, 70(10):3787-3791, October 2023. [doi]

@article{PeiXLWLH23,
  title = {A Unified Clock-Gated Error Correction Scheme With Three-Phase Latch-Based Pipeline for Energy-Efficient Wide Supply Voltage Range Router},
  author = {Bingxi Pei and Shi Xu and Zhang Luo and Qin Wang 0009 and Mingche Lai and Weifeng He},
  year = {2023},
  month = {October},
  doi = {10.1109/TCSII.2023.3288894},
  url = {https://doi.org/10.1109/TCSII.2023.3288894},
  researchr = {https://researchr.org/publication/PeiXLWLH23},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. Circuits Syst. II Express Briefs},
  volume = {70},
  number = {10},
  pages = {3787-3791},
}