A Unified Clock-Gated Error Correction Scheme With Three-Phase Latch-Based Pipeline for Energy-Efficient Wide Supply Voltage Range Router

Bingxi Pei, Shi Xu, Zhang Luo, Qin Wang 0009, Mingche Lai, Weifeng He. A Unified Clock-Gated Error Correction Scheme With Three-Phase Latch-Based Pipeline for Energy-Efficient Wide Supply Voltage Range Router. IEEE Trans. Circuits Syst. II Express Briefs, 70(10):3787-3791, October 2023. [doi]

Abstract

Abstract is missing.