Dynamic hit logic with embedded 8Kb SRAM in 45nm SOI for the zEnterprise™ processor

Antonio Pelella, Yuen H. Chan, Bargav Balakrishnan, Pradip Patel, Daniel Rodko, Richard E. Serton. Dynamic hit logic with embedded 8Kb SRAM in 45nm SOI for the zEnterprise™ processor. In IEEE International Solid-State Circuits Conference, ISSCC 2011, Digest of Technical Papers, San Francisco, CA, USA, 20-24 February, 2011. pages 72-73, IEEE, 2011. [doi]

@inproceedings{PelellaCBPRS11,
  title = {Dynamic hit logic with embedded 8Kb SRAM in 45nm SOI for the zEnterprise™ processor},
  author = {Antonio Pelella and Yuen H. Chan and Bargav Balakrishnan and Pradip Patel and Daniel Rodko and Richard E. Serton},
  year = {2011},
  doi = {10.1109/ISSCC.2011.5746224},
  url = {http://dx.doi.org/10.1109/ISSCC.2011.5746224},
  researchr = {https://researchr.org/publication/PelellaCBPRS11},
  cites = {0},
  citedby = {0},
  pages = {72-73},
  booktitle = {IEEE International Solid-State Circuits Conference, ISSCC 2011, Digest of Technical Papers, San Francisco, CA, USA, 20-24 February, 2011},
  publisher = {IEEE},
  isbn = {978-1-61284-303-2},
}