A Power Model Combined of Architectural Level and Gate Level for Multicore Processors

Manman Peng, Yan Hu. A Power Model Combined of Architectural Level and Gate Level for Multicore Processors. In 12th IEEE International Conference on Trust, Security and Privacy in Computing and Communications, TrustCom 2013 / 11th IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA-13 / 12th IEEE International Conference on Ubiquitous Computing and Communications, IUCC-2013, Melbourne, Australia, July 16-18, 2013. pages 1652-1655, IEEE, 2013. [doi]

Authors

Manman Peng

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Yan Hu

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