FPGA design space exploration of IDEA cryptography IP core

Dinesh Varma Penumetcha, Jiafeng Xie, Saiyu Ren. FPGA design space exploration of IDEA cryptography IP core. In IEEE 58th International Midwest Symposium on Circuits and Systems, MWSCAS 2015, Fort Collins, CO, USA, August 2-5, 2015. pages 1-4, IEEE, 2015. [doi]

@inproceedings{PenumetchaXR15,
  title = {FPGA design space exploration of IDEA cryptography IP core},
  author = {Dinesh Varma Penumetcha and Jiafeng Xie and Saiyu Ren},
  year = {2015},
  doi = {10.1109/MWSCAS.2015.7282150},
  url = {https://doi.org/10.1109/MWSCAS.2015.7282150},
  researchr = {https://researchr.org/publication/PenumetchaXR15},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {IEEE 58th International Midwest Symposium on Circuits and Systems, MWSCAS 2015, Fort Collins, CO, USA, August 2-5, 2015},
  publisher = {IEEE},
  isbn = {978-1-4673-6558-1},
}