VHDL-based behavioural description of pipeline ADCs

Eduardo J. Peralías, Antonio J. Acosta, Adoración Rueda, José L. Huertas. VHDL-based behavioural description of pipeline ADCs. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 681-684, IEEE, 2000. [doi]

@inproceedings{PeraliasARH00-0,
  title = {VHDL-based behavioural description of pipeline ADCs},
  author = {Eduardo J. Peralías and Antonio J. Acosta and Adoración Rueda and José L. Huertas},
  year = {2000},
  doi = {10.1109/ISCAS.2000.858843},
  url = {https://doi.org/10.1109/ISCAS.2000.858843},
  researchr = {https://researchr.org/publication/PeraliasARH00-0},
  cites = {0},
  citedby = {0},
  pages = {681-684},
  booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings},
  publisher = {IEEE},
}