A DFT Technique for Analog-to-Digital Converters with digital correction

Eduardo J. Peralías, Adoración Rueda, José L. Huertas. A DFT Technique for Analog-to-Digital Converters with digital correction. In 15th IEEE VLSI Test Symposium (VTS 97), April 27-May 1, 1997, Monterey, California, USA. pages 302-307, IEEE Computer Society, 1997. [doi]

Abstract

Abstract is missing.