Juan Andrés Pérez-Celis, José Martínez-Carranza, Alicia Morales-Reyes, Claudia Feregrino Uribe, René Cumplido. An FPGA Architecture to Accelerate the Burrows Wheeler Transform by Using a Linear Sorter. In 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPS Workshops 2016, Chicago, IL, USA, May 23-27, 2016. pages 156-161, IEEE Computer Society, 2016. [doi]
Abstract is missing.