A Simple Ethernet Stack Implementation in VHDL to Enable FPGA Logic Reconfigurability

Marcus R. Perrett, Izzat Darwazeh. A Simple Ethernet Stack Implementation in VHDL to Enable FPGA Logic Reconfigurability. In Peter M. Athanas, Jürgen Becker, René Cumplido, editors, 2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011, Cancun, Mexico, November 30 - December 2, 2011. pages 286-290, IEEE Computer Society, 2011. [doi]

@inproceedings{PerrettD11,
  title = {A Simple Ethernet Stack Implementation in VHDL to Enable FPGA Logic Reconfigurability},
  author = {Marcus R. Perrett and Izzat Darwazeh},
  year = {2011},
  doi = {10.1109/ReConFig.2011.6},
  url = {http://doi.ieeecomputersociety.org/10.1109/ReConFig.2011.6},
  researchr = {https://researchr.org/publication/PerrettD11},
  cites = {0},
  citedby = {0},
  pages = {286-290},
  booktitle = {2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011, Cancun, Mexico, November 30 - December 2, 2011},
  editor = {Peter M. Athanas and Jürgen Becker and René Cumplido},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4577-1734-5},
}