Implementation of Sparse Matrix Arithmetic on a DSP Processor

Davorka Petrinovic, Ivan Lukacevic, Davor Petrinovic. Implementation of Sparse Matrix Arithmetic on a DSP Processor. In M. H. Hamza, editor, Signal and Image Processing (SIP 2003), Proceedings of the IASTED International Conference, August 13-15, 2003, Honolulu, HI, USA. pages 93-98, IASTED/ACTA Press, 2003. [doi]

@inproceedings{PetrinovicLP03,
  title = {Implementation of Sparse Matrix Arithmetic on a DSP Processor},
  author = {Davorka Petrinovic and Ivan Lukacevic and Davor Petrinovic},
  year = {2003},
  url = {http://www.actapress.com/Abstract.aspx?paperId=15672},
  researchr = {https://researchr.org/publication/PetrinovicLP03},
  cites = {0},
  citedby = {0},
  pages = {93-98},
  booktitle = {Signal and Image Processing (SIP 2003), Proceedings of the IASTED International Conference, August 13-15, 2003, Honolulu, HI, USA},
  editor = {M. H. Hamza},
  publisher = {IASTED/ACTA Press},
  isbn = {0-88986-378-4},
}