Design methodology for fault tolerant ASICs

Vladimir Petrovic, Marko Ilic, Günter Schoof, Zoran Stamenkovic. Design methodology for fault tolerant ASICs. In Jaan Raik, Viera Stopjaková, Heinrich Theodor Vierhaus, Witold A. Pleskacz, Raimund Ubar, Helena Kruus, Maksim Jenihhin, editors, IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2012, Tallinn, Estonia, April 18-20, 2012. pages 8-11, IEEE, 2012. [doi]

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