Two-Extra-Column Trellis Min-Max Decoder Architecture for Nonbinary LDPC Codes

Huyen Thi Pham, Hanho Lee. Two-Extra-Column Trellis Min-Max Decoder Architecture for Nonbinary LDPC Codes. IEEE Trans. VLSI Syst., 25(5):1787-1791, 2017. [doi]

@article{PhamL17-0,
  title = {Two-Extra-Column Trellis Min-Max Decoder Architecture for Nonbinary LDPC Codes},
  author = {Huyen Thi Pham and Hanho Lee},
  year = {2017},
  doi = {10.1109/TVLSI.2017.2647985},
  url = {http://doi.ieeecomputersociety.org/10.1109/TVLSI.2017.2647985},
  researchr = {https://researchr.org/publication/PhamL17-0},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {25},
  number = {5},
  pages = {1787-1791},
}