A 0.16pJ/Conversion-Step 2.5mW 1.25GS/s 4b ADC in a 90nm Digital CMOS Process

Geert Van der Plas, Stefaan Decoutere, Stéphane Donnay. A 0.16pJ/Conversion-Step 2.5mW 1.25GS/s 4b ADC in a 90nm Digital CMOS Process. In 2006 IEEE International Solid State Circuits Conference, ISSCC 2006, Digest of Technical Papers, an Francisco, CA, USA, February 6-9, 2006. pages 2310, IEEE, 2006. [doi]

Authors

Geert Van der Plas

This author has not been identified. Look up 'Geert Van der Plas' in Google

Stefaan Decoutere

This author has not been identified. Look up 'Stefaan Decoutere' in Google

Stéphane Donnay

This author has not been identified. Look up 'Stéphane Donnay' in Google