The following publications are possibly variants of this publication:
- FPGA Implementations of Piecewise Affine Functions Based on Multi-Resolution Hyperrectangular PartitionsFrancesco Comaschi, Bart A. G. Genuit, Alberto Oliveri, W. P. M. H. Heemels, Marco Storace. tcas, 59-I(12):2920-2933, 2012. [doi]
- Digital architectures implementing piecewise-affine functions: An overviewTomaso Poggi, Marco Storace. iscas 2010: 3304-3307 [doi]
- FPGA implementation of a new scheme for the circuit realization of PWL functionsAlessio Boggiano, Simone Delfitto, Tomaso Poggi, Marco Storace. ecctd 2007: 874-877 [doi]