Session Summary I: Quantum informatics: Classical circuit synthesis, resource optimisation and benchmarking

Ilia Polian. Session Summary I: Quantum informatics: Classical circuit synthesis, resource optimisation and benchmarking. In 21st IEEE Asian Test Symposium, ATS 2012, Niigata, Japan, November 19-22, 2012. pages 49, IEEE Computer Society, 2012. [doi]

@inproceedings{Polian12,
  title = {Session Summary I: Quantum informatics: Classical circuit synthesis, resource optimisation and benchmarking},
  author = {Ilia Polian},
  year = {2012},
  doi = {10.1109/ATS.2012.88},
  url = {http://doi.ieeecomputersociety.org/10.1109/ATS.2012.88},
  researchr = {https://researchr.org/publication/Polian12},
  cites = {0},
  citedby = {0},
  pages = {49},
  booktitle = {21st IEEE Asian Test Symposium, ATS 2012, Niigata, Japan, November 19-22, 2012},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4673-4555-2},
}