Reducing ATE Cost in System-on-Chip Test

Ilia Polian, Bernd Becker. Reducing ATE Cost in System-on-Chip Test. In Manfred Glesner, Ricardo Augusto da Luz Reis, Hans Eveking, Vincent John Mooney III, Leandro Soares Indrusiak, Peter Zipf, editors, IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003. pages 337-342, Technische Universität Darmstadt, Insitute of Microelectronic Systems, 2003.

@inproceedings{PolianB03,
  title = {Reducing ATE Cost in System-on-Chip Test},
  author = {Ilia Polian and Bernd Becker},
  year = {2003},
  tags = {testing},
  researchr = {https://researchr.org/publication/PolianB03},
  cites = {0},
  citedby = {0},
  pages = {337-342},
  booktitle = {IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003},
  editor = {Manfred Glesner and Ricardo Augusto da Luz Reis and Hans Eveking and Vincent John Mooney III and Leandro Soares Indrusiak and Peter Zipf},
  publisher = {Technische Universität Darmstadt, Insitute of Microelectronic Systems},
  isbn = {3-901882-17-0},
}