Architectural core salvaging in a multi-core processor for hard-error tolerance - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Michael D. Powell, Arijit Biswas, Shantanu Gupta, Shubhendu S. Mukherjee. Architectural core salvaging in a multi-core processor for hard-error tolerance. In Stephen W. Keckler, Luiz André Barroso, editors, 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA. pages 93-104, ACM, 2009. [doi]

This author has not been identified. Look up 'Michael D. Powell' in GoogleThis author has not been identified. Look up 'Arijit Biswas' in GoogleThis author has not been identified. Look up 'Shantanu Gupta' in GoogleThis author has not been identified. Look up 'Shubhendu S. Mukherjee' in Google

runs on WebDSL