Wilson Pradeep, Prakash Narayanan, Rubin A. Parekhji. An optimised SDD ATPG and SDQL computation method across different pattern sets. In 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017. pages 1-6, IEEE, 2017. [doi]
@inproceedings{PradeepNP17,
title = {An optimised SDD ATPG and SDQL computation method across different pattern sets},
author = {Wilson Pradeep and Prakash Narayanan and Rubin A. Parekhji},
year = {2017},
doi = {10.1109/VTS.2017.7928922},
url = {https://doi.org/10.1109/VTS.2017.7928922},
researchr = {https://researchr.org/publication/PradeepNP17},
cites = {0},
citedby = {0},
pages = {1-6},
booktitle = {35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017},
publisher = {IEEE},
isbn = {978-1-5090-4482-5},
}