Post Assembly Timing Closure for Multi Million Gate Chips

Shashank Prasad, Dongzi Liu, Oleg Levitsky, Dave Noice, Shailendra Srivastava. Post Assembly Timing Closure for Multi Million Gate Chips. In VLSI Design 2010: 23rd International Conference on VLSI Design, 9th International Conference on Embedded Systems, Bangalore, India, 3-7 January 2010. pages 75-80, IEEE, 2010. [doi]

Abstract

Abstract is missing.