A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit with High Speed Feed Forward Correction in 65 nm CMOS

Jeffrey Prinzie, Szymon Kulis, Pedro Leitao, Rui Francisco, Valentijn De Smedt, Paulo Moreira, Paul Leroux. A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit with High Speed Feed Forward Correction in 65 nm CMOS. In Roberto S. Murphy, editor, 10th IEEE Latin American Symposium on Circuits & Systems, LASCAS 2019, Armenia, Colombia, February 24-27, 2019. pages 63-66, IEEE, 2019. [doi]

@inproceedings{PrinzieKLFSML19,
  title = {A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit with High Speed Feed Forward Correction in 65 nm CMOS},
  author = {Jeffrey Prinzie and Szymon Kulis and Pedro Leitao and Rui Francisco and Valentijn De Smedt and Paulo Moreira and Paul Leroux},
  year = {2019},
  doi = {10.1109/LASCAS.2019.8667542},
  url = {https://doi.org/10.1109/LASCAS.2019.8667542},
  researchr = {https://researchr.org/publication/PrinzieKLFSML19},
  cites = {0},
  citedby = {0},
  pages = {63-66},
  booktitle = {10th IEEE Latin American Symposium on Circuits & Systems, LASCAS 2019, Armenia, Colombia, February 24-27, 2019},
  editor = {Roberto S. Murphy},
  publisher = {IEEE},
  isbn = {978-1-7281-0453-9},
}