Table of Contents

• Low Noise Front-End and ADC for Real-Time ECG System in CMOS ProcessGardella Pablo, Villa Fernandez Emanuel, Baez Eduardo, Biberidis Nicolas, M. Cesaretti Juan. 1-4 [doi]
• Prototyping a Biologically Plausible Neuron Model on a Heterogeneous CPU-FPGA BoardKaleb Alfaro-Badilla, Alfonso Chacon-Rodriguez, Georgios Smaragdos, Christos Strydis, Andres Arroyo-Romero, Javier Espinoza-Gonzalez, Carlos Salazar-Garcia. 5-8 [doi]
• A 13-nW Voltage Reference with Orthogonal Trimming of Absolute Value and Temperature CoefficientJader A. De Lima, Fortunato C. Dualibe. 9-12 [doi]
• Voltage CMOS Quaternary Gates for Digital DesignsMilton E. R. Romero, Evandro Mazina Martins, D. C. A. Arigoni, A. de M. Nogueira, Mario Enrique Duarte Gonzalez. 13-16 [doi]
• Evaluation of Distortion Level in Analog Multipliers through DC Analysis OnlyGabriele Costa Goncalves, Mario Henrique Oliva Pereira Silva, Fabian Souza de Andrade, Fernando Martins Cardoso, Antonio Jose Sobrinho de Sousa, Edson Pinto Santana, Ana Isabela Araújo Cunha. 17-20 [doi]
• Performance evaluation of Tunnel-FET basic amplifier circuitsR. S. Rangel, Paula Ghedini Der Agopian, João Antonio Martino. 21-24 [doi]
• A Segmentation Algorithm for Capacitively Loaded Planar Resonant StructuresIhsan Erdin, Ramachandra Achar. 25-26 [doi]
• Composite Resistor Technique for Process and Temperature Compensations of Low Power Ring OscillatorsHakan Cetinkaya, Ali Zeki, Alper Girgin, Tufan Coskun Karalar. 29-32 [doi]
• LIM Algorithms for MOSFET ModelsJose Schutt-Aine, Patrick Goh. 33-36 [doi]
• Behavioral Modeling of Pre-emphasis Drivers Including Power Supply Noise Using Neural NetworksHuan Yu, Jaemin Shin, Tim Michalka, Mourad Larbi, Madhavan Swaminathan. 37-40 [doi]
• CNN Learning for Image Processing: Center of Mass versus Genetic AlgorithmsFabian Souza de Andrade, Edson Pinto Santana, Ana Isabela Araújo Cunha, Eduardo Furtado de Simas Filho, Gabriele Costa Goncalves, Antonio Jose Sobrinho de Sousa. 41-44 [doi]
• An All-Thin-Devices Level Shifter in Standard-Cell Format for Auto Place-and-Route FlowNestor Cuevas, Javier Ardila, Elkim Roa. 45-48 [doi]
• An asymmetrical bulk-modified composite MOS transistor with enhanced linearityAlfredo Arnaud, Rafael Puyol, Alfonso Chacon-Rodriguez, Matías R. Miguez, Joel Gak. 49-52 [doi]
• A 1.8V 9bit 10MS/s SAR ADC in 0.18µm CMOS for bioimpedance analysisDaniele Santana, Hugo Hernandez, Wilhelmus A. M. Van Noije. 53-56 [doi]
• Memristor device fabricated from doped graphene oxideMarina Sparvoli, Mario A. Gazziro, Jonas S. Marma, Gabriel Zucchi. 57-60 [doi]
• Introducing Asymmetry in a CMOS Latch to Obtain Inherent Power-On-Reset BehaviorFabian L. Cabrera, F. Rangel de Sousa, Héctor Pettenghi. 61-64 [doi]
• A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit with High Speed Feed Forward Correction in 65 nm CMOSJeffrey Prinzie, Szymon Kulis, Pedro Leitao, Rui Francisco, Valentijn De Smedt, Paulo Moreira, Paul Leroux. 63-66 [doi]
• Power-Efficient Approximate SAD Architecture with LOA Imprecise AddersRoger Endrigo Carvalho Porto, Luciano Agostini, Bruno Zatt, Nuno Roma, Marcelo Schiavon Porto. 65-68 [doi]
• Process Variability Challenges for Radiation Mitigation Techniques on 16nmSamuel Presa Toledo, Ricardo Reis, Cristina Meinhardt. 69-72 [doi]
• Facilitating Fault-Simulation Comprehension through a Fault-Lists Analysis ToolPaolo Bernardi, Davide Piumatti, E. Sanchez. 77-80 [doi]
• Post-Silicon Debugging Platform with Bus Monitoring Capability to Perform Behavioral and Performance AnalysesWilmer Ramirez, Elkim Roa. 81-84 [doi]
• A Sub-µW Reconfigurable Front-End for Invasive Neural RecordingJosé Luis Valtierra, Rafaella Fiorelli, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez. 85-88 [doi]
• A Framework for Heterogeneous Many-core SoCs GenerationMarcelo Ruaro, Luciano L. Caimi, Vinicius Fochi, Fernando Gehm Moraes. 89-92 [doi]
• A High Throughput Hardware Architecture Targeting the AV1 Paeth Intra PredictorMarcel Moscarelli Corrêa, Bianca Waskow, Jones Goebel, Daniel Palomino, Guilherme Corrêa, Luciano Agostini. 93-96 [doi]
• A Low-Area Direct Memory Access Controller Architecture for a RISC-V Based Low-Power MicrocontrollerHanssel Morales, Ckristian Duran, Elkim Roa. 97-100 [doi]
• FPGA IP for Real-time 4K HDR Image Decoding in VR DevicesKamlakannan Kamalavasan, Ratnasegar Natheesan, Kathirgamaraja Pradeep, Sivakumaran Gowthaman, Sivakaneshan Aravinth, Ajith Pasqual. 101-104 [doi]
• Microprocessor Design with a Direct Bluetooth Connection in 45 nm Technology Using MicrowindEsteban Garzon, Felix Chavez, Diego Jaramillo, Luis Sanchez, Sofia Lara, Carlos Macias, Eliana Acurio, Luis-Miguel Procel, Lionel Trojman, Etienne Sicard. 105-108 [doi]
• ISFETs: theory, modeling and chip for characterizationRodrigo Wrege, Márcio Cherem Schneider, Janaina Gonçalves Guimarães, Carlos Galup-Montoro. 109-112 [doi]
• Recognition of emotions using ICEEMD-based characterization of multimodal physiological signalsO. A. Ordóñez-Bolaños, J. F. Gómez-Lara, Miguel A. Becerra, Diego Hernán Peluffo-Ordóñez, C. M. Duque-Mejía, D. Medrano-David, Cristian Mejía-Arboleda. 113-116 [doi]
• ASC-FFT: Area-Efficient Low-Latency FFT Design Based on Asynchronous Stochastic ComputingPatricia Gonzalez-Guerrero, Xinfei Guo, Mircea R. Stan. 117-120 [doi]
• Dedicated monitoring service without routing mitigation for Networks-on-ChipGabriel Ganzer, Marcelo Daniel Berejuck. 121-124 [doi]
• Analog-to-Information Converter Based on Off-the-Shelf Components and SoC-FPGAAlexander López-Parrado, Alexander Vera-Tasama, Juan Felipe Medina Lee, Duvier de Jesus Bohorquez-Palacio. 125-128 [doi]
• A Black-box Model for NeuronsNestor Roqueiro, C. Claumann, A. Guillamon, Enric Fossas. 129-132 [doi]
• Analytical Modeling of Chaotic Sampling of Regular Waveform for Random Number GenerationKaya Demir, Salih Ergun. 133-136 [doi]
• Asynchronous Quasi-Random Number Generator: Taking Advantage of PVT VariationsRodrigo N. Wuerdig, Marcos L. L. Sartori, Ney Laert Vilar Calazans. 137-140 [doi]
• Accelerating Template Matching for Efficient Object TrackingAlexandre de Vasconcelos Cardoso, Nadia Nedjah, Luiza de Macedo Mourelle. 141-144 [doi]
• Mapping and Placement in NoC-based Reconfigurable Systems Using an Adaptive Tabu Search AlgorithmGuilherme Apolinario Silva Novaes, Luiz Carlos Moreira, Wang Jiang Chau. 145-148 [doi]
• Clip Clustering for Early Lithographic Hotspot ClassificationAndre Saldanha Oliveira, Julia Casarin Puget, Carolina Metzler, Ricardo Reis. 149-152 [doi]
• A State Assignment Method for Extended Burst-Mode gC Finite State Machines Based on Genetic AlgorithmTiago Curtinhas, Duarte L. Oliveira, Gracieth C. Batista, Vitor L. V. Torres, Leonardo Romano. 153-156 [doi]
• A Dependency-Free Real-Time UHD Architecture for the Initial Stage of HEVC Motion EstimationHaris Chaudhry, Mario Raffo-Jara, Carlos Silva Cárdenas, Cristopher Villegas. 157-160 [doi]
• A Novel Model for the Resonance Frequency in Lamb Wave Resonators based on AlNA. F. Jaramillo Alvarado, A. Torres Jacome, F. De la Hidalga-W, E. Torres Rios. 161-164 [doi]
• A Pseudo-Raised Cosine IR-UWB pulse generator with adaptive PSD using 130nm CMOS processLuiz Carlos Moreira, Jose Fontebasso Neto, Walter S. Oliveira, Thiago Ferauche, Guilherme Apolinario Silva Novaes. 165-168 [doi]
• Smart Water Management System using the Microcontroller ZR16S08 as IoT SolutionMichel R. Machado, Tiago Ribas Junior, Michele R. Silva, Joao B. Martins. 169-172 [doi]
• A Programmable and Low-Area On-Die Termination for High-Speed InterfacesLuisa Dovale, Juan Sebastian Moya, Elkim Roa. 173-176 [doi]
• An Implementation of Extended Burst-Mode Specifications as Quasi Delay Insensitive State MachinesDuarte L. Oliveira, Orlando Verducci, Vitor L. V. Torres, Gracieth C. Batista, Robson L. Moreno, Leonardo Romano. 177-180 [doi]
• On-Chip Solar Energy Harvesting System Using Substrate Diode PV Cell and Fractional Open Circuit Voltage MPPT ImplementationDaniel Rodriguez, Carlos Bernal, Guillermo Serrano. 181-184 [doi]
• An Ultra-Low Power Multi-Level Power-on Reset for Fine-Grained Power Management StrategiesLuis E. Rueda G., Nestor Cuevas, Elkim Roa. 185-188 [doi]
• Output Voltage Regulation For dc-dc Buck Converters: a Passivity-Based PI DesignWalter Julián Gil-González, Oscar Danilo Montoya, A. Garces, Fedrico M. Serra, Guillermo Magaldi. 189-192 [doi]
• Reliability Assessment in Transmission Considering Intermittent Energy ResourcesAlfredo G. Tobon, Harold R. Chamorro, Francisco Gonzalez-Longatt, Vijay K. Sood. 193-196 [doi]
• A Simplified Tool for Testing of Feature Selection and Classification Algorithms in Motor Imagery of Right and Left Hands of EEG SignalsGiovanna Bonafe Bernardi, Tales Cleber Pimenta, Robson Luiz Moreno. 197-200 [doi]
• High-Performance Fault Diagnosis Schemes for Efficient Hash Algorithm BLAKEMehran Mozaffari Kermani, Siavash Bayat Sarmadi, A.-Bon Ackie, Reza Azarderakhsh. 201-204 [doi]
• 4D Bidirectional Lattice Digital FiltersM. T. Kousoulis, C. A. Coutras, G. E. Antoniou. 205-208 [doi]
• A Signal Reconstruction Technique For Power Delivery AnalysisCarlos J. Franco-Tinoco, Ricardo Astro-Bohorquez, Daniel Garcia-Mora. 209-212 [doi]
• Development of Foundation Fieldbus H1 Controller ICThiago P. Mussolini, Filipe Guimarães Russo Ramos, Robson L. Moreno, Tales Cleber Pimenta. 213-216 [doi]
• Optimized Fault-Tolerant Buffer Design for Network-on-Chip ApplicationsAlan Cadore Pinheiro, Jarbas A. N. Silveira, Daniel A. B. Tavares, Felipe G. A. e Silva, César A. M. Marcon. 217-220 [doi]
• A Digital Random Number Generator Based on Irregular Sampling of Regular WaveformBurak Acar, Salih Ergun. 221-224 [doi]
• A Tools Flow for Synthesis of Asynchronous Control Circuits from Extended STG SpecificationsHigor A. Delsoto, Duarte L. Oliveira, Gracieth C. Batista, Diego A. Silva, Leonardo Romano. 225-228 [doi]
• About Performance Faults in Microprocessor Core in-field TestingJulio Pérez Acle, Ernesto Sánchez 0001, Matteo Sonza Reorda. 229-232 [doi]
• On UVM Reliability in Mixed-Signal VerificationWilmer Ramirez, Hector Gomez, Elkim Roa. 233-236 [doi]
• Resilient Hardware Design for Critical SystemsMarcos Santana Farias, Nadia Nedjah, Paulo Victor R. de Carvalho. 237-240 [doi]
• A Very Compact CMOS Analog Multiplier for Application in CNN SynapsesAntonio Jose Sobrinho de Sousa, Fernando Martins Cardoso, Kelvin Kefren Carvalho Feitosa Nunes, Fabian Souza de Andrade, Gabriele Costa Goncalves, Edson Pinto Santana, Ana Isabela Araújo Cunha. 241-244 [doi]
• Low-Power and High-Throughput Approximate 4×4 DCT Hardware ArchitectureMateus Leme, Luciano A. Braatz, Daniel Palomino, Luciano Agostini, Marcelo Schiavon Porto. 245-248 [doi]
• Delta-Sigma modulated output temperature sensor for 1V voltage supplyJose L. Ramirez, Joao P. Tiol, Diego Deotti, Fabiano Fruett. 249-252 [doi]
• A 130 nm CMOS LNA for Satellite ApplicationRene Moreno Timbo, Hamilton Klimach, Eric E. Fabris. 253-256 [doi]