E. Sanchez - researchr alias

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Viewing Publication 1 - 35 from 35

2022

2020

Design, Verification, Test and In-Field Implications of Approximate Computing SystemsAlberto Bosio, S. Di Carlo, P. Girard, E. Sanchez, Alessandro Savino, Lukás Sekanina, Marcello Traiola, Zdenek Vasícek, Arnaud Virazel. ets 2020: 1-10 [doi]

2019

2018

Parallel software-based self-test suite for multi-core system-on-chip: Migration from single-core to multi-core automotive microcontrollersA. Floridia, Davide Piumatti, E. Sanchez, S. De Luca, Alessandro Sansonetti. dtis 2018: 1-6 [doi]

Development flow of on-line Software Test Libraries for asynchronous processor coresA. Floridia, E. Sanchez, Nikolaos Andrikos. iolts 2018: 73-78 [doi]

Hybrid On-Line Self-Test Strategy for Dual-Core Lockstep ProcessorsA. Floridia, E. Sanchez. dft 2018: 1-6 [doi]

2017

2015

On the functional test of the cache coherency logic in multi-core systemsJulio Pérez Acle, Riccardo Cantoro, E. Sanchez, Matteo Sonza Reorda. lascas 2015: 1-4 [doi]

On the Design of a Fault Tolerant Ripple-Carry Adder with Controllable-Polarity TransistorsHassan Ghasemzadeh, Pierre-Emmanuel Gaillardon, J. Zhang, Giovanni De Micheli, E. Sanchez, Matteo Sonza Reorda. isvlsi 2015: 491-496 [doi]

2014

2013

A software-based self-test strategy for on-line testing of the scan chain circuitries in embedded microprocessorsOscar Ballan, Paolo Bernardi, B. Yazdani, E. Sanchez. iolts 2013: 79-84 [doi]

On the Functional Test of the Register Forwarding and Pipeline Interlocking Unit in Pipelined ProcessorsPaolo Bernardi, R. Cantoro, Lyl M. Ciganda Brasca, B. Du, E. Sanchez, Matteo Sonza Reorda, Michelangelo Grosso, Oscar Ballan. mtv 2013: 52-57 [doi]

A functional test algorithm for the register forwarding and pipeline interlocking unit in pipelined microprocessorsPaolo Bernardi, D. Boyang, Lyl M. Ciganda, E. Sanchez, Matteo Sonza Reorda, Michelangelo Grosso, Oscar Ballan. idt 2013: 1-6 [doi]

On the on-line functional test of the Reorder Buffer memory in superscalar processorsS. Di Carlo, E. Sanchez, Matteo Sonza Reorda. ddecs 2013: 36-41 [doi]

On the functional test of the BTB logic in pipelined and superscalar processorsD. Changdao, M. Graziano, E. Sanchez, Matteo Sonza Reorda, Maurizio Zamboni, N. Zhifan. latw 2013: 1-6 [doi]

2011

2007

2002

On achieving secure seamless mobilityE. Sanchez, R. Edwards. mwcn 2002: 574-578 [doi]

1997

Speeding-up adaptive heuristic critic learning with FPGA-based unsupervised clusteringAndrés Pérez-Uribe, E. Sanchez. icec 1997: 685-689 [doi]

1995

Development and prototyping system far an 8-bit multitask micropower processorS. Fink, E. Sanchez. rsp 1995: 75-78 [doi]

1989

A microprogramming teaching environment using the Macintosh computerE. Sanchez. micro 1989: 148-155 [doi]

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