Abstract is missing.
- Welcome MessageRishad A. Shafik, Qiaoyan Yu, S. Saqib Khursheed, Antonio Miele. [doi]
- Reliability-aware synthesis and fault test of fully programmable valve arrays (FPVAs)Bing Li, Ulf Schlichtmann. 1 [doi]
- Simulation-based evaluation of frequency upscaled operation of exact/approximate ripple carry addersH. Junqi, T. Nandha Kumar, Haider Abbas, Fabrizio Lombardi. 1-6 [doi]
- On-line software-based self-test for ECC of embedded RAM memoriesMarco Restifo, Paolo Bernardi, S. De Luca, Alessandro Sansonetti. 1-6 [doi]
- High performance fault tolerance through predictive instruction re-executionJyothish Soman, Timothy M. Jones 0001. 1-4 [doi]
- Region based containers - A new paradigm for the analysis of fault tolerant networksPrashant D. Joshi, Arunabha Sen, D. Frank Hsu, Said Hamdioui, Koen Bertels. 1-4 [doi]
- Scheduling voter checks to detect configuration memory errors in FPGA-based TMR systemsNguyen T. H. Nguyen, Ediz Cetin, Oliver Diessel. 1-4 [doi]
- CAL: Exploring cost, accuracy, and latency in approximate and speculative adder designSina Boroumand, Hadi Parandeh-Afshar, Philip Brisk, Siamak Mohammadi. 1-6 [doi]
- Design-for-testability for paper-based digital microfluidic biochipsJain-De Li, Sying-Jyan Wang, Katherine Shu-Min Li, Tsung-Yi Ho. 1 [doi]
- Early estimation of aging in the design flow of integrated circuits through a programmable hardware moduleChiara Sandionigi, Mauricio Altieri, Olivier Héron. 1-6 [doi]
- Unintrusive aging analysis based on offline learningFrank Sill Torres, Pedro Fausto Rodrigues Leite, Rolf Drechsler. 1-4 [doi]
- A dynamic reliability management framework for heterogeneous multicore systemsAlessandro Baldassari, Cristiana Bolchini, Antonio Miele. 1-6 [doi]
- RASSS: A perfidy-aware protocol for designing trustworthy distributed systemsLake Bu, Hien D. Nguyen, Michel A. Kinsy. 1-6 [doi]
- Kernel vulnerability factor and efficient hardening for histogram of oriented gradientsLucas Weigel, Fernando Fernandes, Philippe O. A. Navaux, Paolo Rech. 1-6 [doi]
- Low cost error monitoring for improved maintainability of IoT applicationsMauricio D. Gutierrez, Vasileios Tenentes, Tom J. Kazmierski, Daniele Rossi 0001. 1-6 [doi]
- High-yield design of high-density SRAM for low-voltage and low-leakage operationsKedar Janardan Dhori, Hitesh Chawla, Ashish Kumar, Prashant Pandey, Promod Kumar, Lorenzo Ciampolini, Florian Cacho, Damien Croain. 1-6 [doi]
- On the optimization of SBST test program compactionR. Cantora, E. Sanchez, Matteo Sonza Reorda, Giovanni Squillero, E. Valea. 1-4 [doi]
- A defective level monitor of open defects in 3D ICs with a comparator of offset cancellation typeMichiya Kanda, Masaki Hashizume, Hiroyuki Yotsuyanagi, Shyue-Kung Lu. 1-4 [doi]
- Hardware and software innovations in energy-efficient system-reliability monitoringVasileios Tenentes, Charles Leech, Graeme M. Bragg, Geoff V. Merrett, Bashir M. Al-Hashimi, Hussam Amrouch, Jörg Henkel, Shidhartha Das. 1-5 [doi]
- Preventing scan-based side-channel attacks through key maskingSatyadev Ahlawat, Darshit Vaghani, Virendra Singh. 1-4 [doi]
- A scrubbing scheduling approach for reliable FPGA multicore processors with real-time constraintsMihalis Psarakis, Aitzan Sari. 1-4 [doi]
- A dynamic test compaction method on low power test generation based on capture safe test vectorsToshinori Hosokawa, Atsushi Hirai, Hiroshi Yamazaki, Masayuki Arai. 1-6 [doi]
- Lifetime reliability characterization of N/MEMS used in power gating of digital integrated circuitsHaider Alrudainy, Rishad A. Shafik, Andrey Mokhov, Alex Yakovlev. 1-6 [doi]
- Realizing strong PUF from weak PUF via neural computingLeandro Santiago, Vinay C. Patil, Charles B. Prado, Tiago A. O. Alves, Leandro A. J. Marzulo, Felipe M. G. França, Sandip Kundu. 1-6 [doi]
- Detecting errors in instructions with bloom filtersMert Atamaner, Oguz Ergin, Marco Ottavi, Pedro Reviriego. 1-4 [doi]
- Towards SRAM leakage power minimization by aggressive standby voltage scaling - Experiments on 40nm test chipsXin Fan, Jan Stuijt, Tobias Gemmeke. 1-4 [doi]
- High-energy neutrons characterization of a safety critical computing systemAndrea Fedi, Marco Ottavi, Gianluca Furano, Antimo Bruno, Roberto Senesi, Carla Andreani, Carlo Cazzaniga. 1-4 [doi]
- A resilient scheduler for dataflow executionTiago A. O. Alves, Sandip Kundu, Leandro A. J. Marzulo, Felipe M. G. França. 1-4 [doi]
- Reconfigurable TAP controllers with embedded compression for large test data volumeSebastian Huhn, Stephan Eggersglüß, Rolf Drechsler. 1-6 [doi]
- Volume management for fault-tolerant continuous-flow microfluidicsAlexander Schneider, Paul Pop, Jan Madsen. 1 [doi]
- Improving test compression with multiple-polynomial LFSRsYu-Wei Lee, Nur A. Touba. 1-4 [doi]
- Exploring soft errors (SEUs) with digital imager pixels ranging from 7 to 1.3 μmGlenn H. Chapman, Parham Purbakht, Peter Le, Israel Koren, Zahava Koren. 1-4 [doi]
- REMORA: A hybrid low-cost soft-error reliable fault tolerant architectureShoba Gopalakrishnan, Virendra Singh. 1-6 [doi]
- Investigating the effects of process variations and system workloads on endurance of non-volatile cachesAmir Mahdi Hosseini Monazzah, Hamed Farbeh, Seyed Ghassem Miremadi. 1-6 [doi]
- Lifetime memory reliability data from the fieldTaniya Siddiqua, Vilas Sridharan, Steven E. Raasch, Nathan DeBardeleben, Kurt B. Ferreira, Scott Levy, Elisabeth Baseman, Qiang Guan. 1-6 [doi]
- A novel low-overhead fault tolerant parallel-pipelined FFT designYu Xie, Chen Yang, Chuang-An Mao, He Chen, Yizhuang Xie. 1-4 [doi]
- Eliminating a hidden error source in stochastic circuitsPai-Shun Ting, John P. Hayes. 1-6 [doi]
- A scalable pseudo-exhaustive search for fault diagnosis in microfluidic biochipsV. Gokulkrishnan, V. Kamakoti, Nitin Chandrachoodan, Seetal Potluri. 1-4 [doi]
- Machine learning based test pattern analysis for localizing critical power activity areasHarshad Dhotre, Stephan Eggersglüß, Mehdi Dehbashi, Ulrike Pfannkuchen, Rolf Drechsler. 1-6 [doi]