Table of Contents

• A Generic Fast and Low Cost BIST Solution for CMOS Image SensorsJ. Lefevre, P. Debaud, Patrick Girard 0001, Arnaud Virazel. 1-2 [doi]
• Enabling Coverage-Based Verification in ChiselAndrew Dobis, Hans Jakob Damsgaard, Enrico Tolotto, Kasper Hesse, Tjark Petersen, Martin Schoeberl. 1-6 [doi]
• An Optimized Burn-In Stress Flow targeting Interconnections logic to Embedded Memories in Automotive Systems-on-ChipF. Angione, P. Bernardi, G. Filipponi, M. Sonza Reorda, D. Appello, V. Tancorre, R. Ugioli. 1-6 [doi]
• Research on Path Delay with BTI Recovery EffectJiebing Wu, Yongsheng Sun, Yuan Wang, Yukai Lin, Mingna Fan, Junlin Huang. 1-4 [doi]
• PVT Analysis for RRAM and STT-MRAM-based Logic Computation-in-MemoryMoritz Fieback, Christopher Münch, Anteneh Gebregiorgis, Guilherme Cardoso Medeiros, Mottaqiallah Taouil, Said Hamdioui, Mehdi B. Tahoori. 1-6 [doi]
• RRAM Crossbar-Based Fault-Tolerant Binary Neural Networks (BNNs)Anteneh Gebregiorgis, Artemis Zografou, Said Hamdioui. 1-2 [doi]
• SpinalFuzz: Coverage-Guided Fuzzing for SpinalHDL DesignsKatharina Ruep, Daniel Große. 1-4 [doi]
• Optimized diagnostic strategy for embedded memories of Automotive Systems-on-ChipPaolo Bernardi, G. Insinga, G. Paganini, Riccardo Cantoro, P. Beer, M. Coppetta, N. Mautone, G. Carnevale, P. Scaramuzza, Rudolf Ullmann. 1-6 [doi]
• On Extracting Reliability Information from Speed BinningZahra Paria Najafi-Haghi, Florian Klemme, Hussam Amrouch, Hans-Joachim Wunderlich. 1-4 [doi]
• Detection of Malicious FPGA Bitstreams using CNN-Based LearningJayeeta Chaudhuri, Krishnendu Chakrabarty. 1-2 [doi]
• Prediction of Thermally Accelerated Aging Process at 28nmParvez Anwar Chanawala, Ian Hill, S. Arash Sheikholeslam, André Ivanov. 1-2 [doi]
• AMS Test Vector Generation using AMS Verification and IEEE P1687.2Vladimir A. Zivkovic, Michele Palazzi, Ming Chuen Alvan Lam, Mogens Isager. 1-4 [doi]
• Memristor-based security primitivesSergio Vinagrero Gutierrez. 1-2 [doi]
• Special Session on RF/5G TestWilliam R. Eisenstadt, Mark Roos, Devin Morris, José Luis González-Jiménez, Christopery Mounet, Manuel J. Barragan, Gildas Léger, Florent Cilici, Estelle Lauga-Larroze, Salvador Mir, Sylvain Bourdel, Marc Margalef-Rovira, Issa Alaji, Haitham Ghanem, Guillaume Ducournau, Christophe Gaquière. 1-9 [doi]
• Reducing Routing Overhead by Self-Enabling Functional Path Ring OscillatorsTobias Kilian, Markus Hanel, Daniel Tille, Martin Huch, Ulf Schlichtmann. 1-6 [doi]
• A Data-driven Approach for Fault Detection in the Alternator Unit of Automotive SystemsArunkumar Vijayan, Mehdi B. Tahoori, Ewald Kintzli, Timm Lohmann, Juergen Hans Handl. 1-4 [doi]
• X-Masking for In-System Deterministic TestGrzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer, Bartosz Wlodarczak. 1-6 [doi]
• Machine learning based soft error rate estimation of pass transistor logic in high-speed communicationZhe Zhang, Jan Lappas, André Lucas Chinazzo, Christian Weis, Zhihang Wu, Leibin Ni, Norbert Wehn, Mehdi B. Tahoori. 1-4 [doi]
• FPGA Design Deobfuscation by Iterative LUT Modifications at Bitstream LevelMichail Moraitis, Elena Dubrova. 1-2 [doi]
• Super Acceleration of Dilithium in MPSoCs Critical EnvironmentsJohanna Sepúlveda, Dominik Winkler. 1-4 [doi]
• Hierarchical Memory DiagnosisGuilherme Cardoso Medeiros, Moritz Fieback, Anteneh Gebregiorgis, Mottaqiallah Taouil, Letícia Maria Veiras Bolzani, Said Hamdioui. 1-2 [doi]
• Test, Reliability and Functional Safety Trends for Automotive System-on-ChipF. Angione, D. Appello, J. Aribido, J. Athavale, N. Bellarmino, P. Bernardi, R. Cantoro, C. De Sio, T. Foscale, G. Gavarini, J. Guerrero, M. Huch, G. Iaria, T. Kilian, R. Mariani, R. Martone, A. Ruospo, E. Sanchez, U. Schlichtmann, G. Squillero, M. Sonza Reorda, L. Sterpone, V. Tancorre, R. Ugioli. 1-10 [doi]
• Concurrent Error Detection for LSTM AcceleratorsNooshin Nosrati, Seyedeh Maryam Ghasemi, Mahboobe Sadeghipour Roodsari, Zainalabedin Navabi. 1-2 [doi]
• Evaluating Security of New Locking SIB-based ArchitecturesYogendra Sao, Anjum Riaz, Satyadev Ahlawat, Sk Subidh Ali. 1-6 [doi]
• A Lightweight, Plug-and-Play and Autonomous JTAG Authentication IP for Secure Device TestingS. Lapeyre, Nicolas Valette, Marc Merandat, Marie-Lise Flottes, Bruno Rouzeyre, Arnaud Virazel. 1-4 [doi]
• Real-Time Control-Flow Integrity for Multicore Mixed-Criticality IoT SystemsVahid Eftekhari Moghadam, Paolo Prinetto, Gianluca Roascio. 1-4 [doi]
• Process and Runtime Variation Robustness for Spintronic-Based Neuromorphic FabricSoyed Tuhin Ahmed, Mahta Mayahinia, Michael Hefenbrock, Christopher Münch, Mehdi B. Tahoori. 1-2 [doi]
• Smart Redundancy Schemes for ANNs Against Fault AttacksTroya Çagil Köylü, Said Hamdioui, Mottaqiallah Taouil. 1-2 [doi]
• A Novel Collaborative SSD Test Case Clustering Method Associating I/O Workload and Function CoverageGyohun Jeong, Sangmin Kim, Hyelyun Kim, Sunghee Lee. 1-2 [doi]
• *Jonti Talukdar, Arjun Chaudhuri, Krishnendu Chakrabarty. 1-6 [doi]
• Novel Design For Test (DFT) Concept to Check the Spectral Mask Compliance Defined in the IEEE Std. 802.15.6-2012 of Wireless-Body-Area-Network (WBAN) IC-DevicesAlexander Stephan Oleszczuk, Mohamed Thouabtia, Martin Allinger, Jürgen Röber, Robert Weigel. 1-2 [doi]
• Effective techniques for automatically improving the transition delay fault coverage of Self-Test LibrariesRiccardo Cantoro, Francesco Garau, Patrick Girard, Nima Kolahimahmoudi, Sandro Sartoni, Matteo Sonza Reorda, Arnaud Virazel. 1-2 [doi]
• CNN-based Data-Model Co-Design for Efficient Test-termination PredictionHongfei Wang, Zhanfei Wu, Wei Liu. 1-6 [doi]
• WLAN Rx PER Test Implementation in ATEAlban Haynse Immanuel, Jeyendran Nithyanadam. 1-4 [doi]
• Graph Theory Approach for Multi-site ATE Board Parameter ExtractionAbraham Steenhoek, Praise O. Farayola, Isaac Bruce, Shravan Chaganti, Abalhassan Sheikh, Srivaths Ravi 0001, Degang Chen. 1-2 [doi]
• Novel Method to Measure Common Mode Transient Immunity of IsolatorsMohamed Thouabtia, Alexander Oleszczuk, Thomas Girg, Martin Allinger. 1-2 [doi]
• Machine Learning for Test, Diagnosis, Post-Silicon Validation and Yield OptimizationHussam Amrouch, Krishnendu Chakrabarty, Dirk Pflüger, Ilia Polian, Matthias Sauer 0002, Matteo Sonza Reorda. 1-6 [doi]
• Power Aware TestLikith Kumar Manchukonda, Karthikeyan Natarajan, Manish Arora. 1 [doi]
• On the Impact of Hardware Timing Errors on Stochastic Computing based Neural NetworksFlorian Neugebauer, Stefan Holst, Ilia Polian. 1-6 [doi]
• On-Chip Training of Crosstalk Predictors to Fit UncertaintiesRezgar Sadeghi, Ehsan Akbari, Mohamad Ali Saber. 1-2 [doi]
• Quality Assessment of RFET-based Logic Locking Protection Mechanisms using Formal MethodsMarcel Merten, Sebastian Huhn 0001, Rolf Drechsler. 1-2 [doi]
• On-Line Reliability Estimation of Ring Oscillator PUFSergio Vinagrero Gutierrez, Giorgio Di Natale, Elena Ioana Vatajelu. 1-2 [doi]
• Impact of Atmospheric and Space Radiation on Sensitive Electronic DevicesLucas Matana Luza, Frederic Wrobel, Luis Entrena, Luigi Dilillo. 1-10 [doi]
• Trojan Insertions of Fully Programmable Valve ArraysNadun Sinhabahu, Jian-De Li, Katherine Shu-Min Li, Sying-Jyan Wang, Tsung-Yi Ho. 1-2 [doi]