Fast dynamic simulation of VLSI circuits using reduced order compact macromodel of standard cells

Shivam Priyadarshi, Nikhil Kriplani, Michael B. Steer, T. Robert Harris. Fast dynamic simulation of VLSI circuits using reduced order compact macromodel of standard cells. In Laurence Nagel, Jesse Chen, Ronald S. Vogelsong, editors, 2010 IEEE International Behavioral Modeling and Simulation Conference, BMAS 2010, San Jose, CA, USA, September 23-24, 2010. pages 75-80, IEEE, 2010. [doi]

@inproceedings{PriyadarshiKSH10,
  title = {Fast dynamic simulation of VLSI circuits using reduced order compact macromodel of standard cells},
  author = {Shivam Priyadarshi and Nikhil Kriplani and Michael B. Steer and T. Robert Harris},
  year = {2010},
  doi = {10.1109/BMAS.2010.6156602},
  url = {http://dx.doi.org/10.1109/BMAS.2010.6156602},
  researchr = {https://researchr.org/publication/PriyadarshiKSH10},
  cites = {0},
  citedby = {0},
  pages = {75-80},
  booktitle = {2010 IEEE International Behavioral Modeling and Simulation Conference, BMAS 2010, San Jose, CA, USA, September 23-24, 2010},
  editor = {Laurence Nagel and Jesse Chen and Ronald S. Vogelsong},
  publisher = {IEEE},
  isbn = {978-1-4244-8996-1},
}