Settling Time Optimization for Three-Stage CMOS Amplifier Topologies

Andrea Pugliese 0002, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo. Settling Time Optimization for Three-Stage CMOS Amplifier Topologies. IEEE Trans. on Circuits and Systems, 56-I(12):2569-2582, 2009. [doi]

Abstract

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