LP-HLS: Automatic power-intent generation for high-level synthesis based hardware implementation flow

Affaq Qamar, Fahad Bin Muslim, Javed Iqbal, Luciano Lavagno. LP-HLS: Automatic power-intent generation for high-level synthesis based hardware implementation flow. Microprocessors and Microsystems, 50:26-38, 2017. [doi]

Abstract

Abstract is missing.