An energy-efficient near/sub-threshold FPGA interconnect architecture using dynamic voltage scaling and power-gating

He Qi, Oluseyi A. Ayorinde, Benton H. Calhoun. An energy-efficient near/sub-threshold FPGA interconnect architecture using dynamic voltage scaling and power-gating. In Yuchen Song, Shaojun Wang, Brent Nelson, Junbao Li, Yu Peng, editors, 2016 International Conference on Field-Programmable Technology, FPT 2016, Xi'an, China, December 7-9, 2016. pages 20-27, IEEE, 2016. [doi]

@inproceedings{QiAC16,
  title = {An energy-efficient near/sub-threshold FPGA interconnect architecture using dynamic voltage scaling and power-gating},
  author = {He Qi and Oluseyi A. Ayorinde and Benton H. Calhoun},
  year = {2016},
  doi = {10.1109/FPT.2016.7929183},
  url = {https://doi.org/10.1109/FPT.2016.7929183},
  researchr = {https://researchr.org/publication/QiAC16},
  cites = {0},
  citedby = {0},
  pages = {20-27},
  booktitle = {2016 International Conference on Field-Programmable Technology, FPT 2016, Xi'an, China, December 7-9, 2016},
  editor = {Yuchen Song and Shaojun Wang and Brent Nelson and Junbao Li and Yu Peng},
  publisher = {IEEE},
  isbn = {978-1-5090-5602-6},
}