Cache Friendly Parallelization of Neural Encoder-Decoder Models Without Padding on Multi-core Architecture

Yuchen Qiao, Kazuma Hashimoto, Akiko Eriguchi, Haixia Wang, Dongsheng Wang, Yoshimasa Tsuruoka, Kenjiro Taura. Cache Friendly Parallelization of Neural Encoder-Decoder Models Without Padding on Multi-core Architecture. In 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPS Workshops 2017, Orlando / Buena Vista, FL, USA, May 29 - June 2, 2017. pages 437-440, IEEE Computer Society, 2017. [doi]

@inproceedings{QiaoHEWWTT17,
  title = {Cache Friendly Parallelization of Neural Encoder-Decoder Models Without Padding on Multi-core Architecture},
  author = {Yuchen Qiao and Kazuma Hashimoto and Akiko Eriguchi and Haixia Wang and Dongsheng Wang and Yoshimasa Tsuruoka and Kenjiro Taura},
  year = {2017},
  doi = {10.1109/IPDPSW.2017.165},
  url = {https://doi.org/10.1109/IPDPSW.2017.165},
  researchr = {https://researchr.org/publication/QiaoHEWWTT17},
  cites = {0},
  citedby = {0},
  pages = {437-440},
  booktitle = {2017 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPS Workshops 2017, Orlando / Buena Vista, FL, USA, May 29 - June 2, 2017},
  publisher = {IEEE Computer Society},
  isbn = {978-1-5386-3408-0},
}