Yifeng Qiu, Wael M. Badawy, Robert D. Turney. An Architecture for Programmable Multi-core IP Accelerated Platform with an Advanced Application of H.264 Codec Implementation. VLSI Signal Processing, 57(2):123-137, 2009. [doi]
@article{QiuBT09,
title = {An Architecture for Programmable Multi-core IP Accelerated Platform with an Advanced Application of H.264 Codec Implementation},
author = {Yifeng Qiu and Wael M. Badawy and Robert D. Turney},
year = {2009},
doi = {10.1007/s11265-008-0267-6},
url = {http://dx.doi.org/10.1007/s11265-008-0267-6},
tags = {architecture},
researchr = {https://researchr.org/publication/QiuBT09},
cites = {0},
citedby = {0},
journal = {VLSI Signal Processing},
volume = {57},
number = {2},
pages = {123-137},
}