An Architecture for Programmable Multi-core IP Accelerated Platform with an Advanced Application of H.264 Codec Implementation

Yifeng Qiu, Wael M. Badawy, Robert D. Turney. An Architecture for Programmable Multi-core IP Accelerated Platform with an Advanced Application of H.264 Codec Implementation. VLSI Signal Processing, 57(2):123-137, 2009. [doi]

Abstract

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