High-Performance Pipelined Architecture for Tree-Based IP Lookup Engine on FPGA - researchr publication authors

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Yun Qu, Viktor K. Prasanna. High-Performance Pipelined Architecture for Tree-Based IP Lookup Engine on FPGA. In 2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum, Cambridge, MA, USA, May 20-24, 2013. pages 114-123, IEEE, 2013. [doi]

This author has not been identified. Look up 'Yun Qu' in GoogleThis author has not been identified. Look up 'Viktor K. Prasanna' in Google

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