High-Performance and Dynamically Updatable Packet Classification Engine on FPGA

Yun R. Qu, Viktor K. Prasanna. High-Performance and Dynamically Updatable Packet Classification Engine on FPGA. IEEE Trans. Parallel Distrib. Syst., 27(1):197-209, 2016. [doi]

Authors

Yun R. Qu

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Viktor K. Prasanna

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