A low-power 22-bit incremental ADC with 4 ppm INL, 2 ppm gain error and 2 μV DC offset

Vincent Quiquempoix, Philippe Deval, Alexandre Barreto, Gabriele Bellini, Jerry Collings, János Márkus, José B. Silva, Gabor C. Temes. A low-power 22-bit incremental ADC with 4 ppm INL, 2 ppm gain error and 2 μV DC offset. In Laurent Fesquet, Andreas Kaiser, Sorin Cristoloveanu, Michel Brillouët, editors, Proceedings of the 31st European Solid-State Circuits Conference, ESSCIRC 2005, Grenoble, France, 12-16 September 2005. pages 443-446, IEEE, 2005. [doi]

@inproceedings{QuiquempoixDBBCMST05,
  title = {A low-power 22-bit incremental ADC with 4 ppm INL, 2 ppm gain error and 2 μV DC offset},
  author = {Vincent Quiquempoix and Philippe Deval and Alexandre Barreto and Gabriele Bellini and Jerry Collings and János Márkus and José B. Silva and Gabor C. Temes},
  year = {2005},
  doi = {10.1109/ESSCIR.2005.1541655},
  url = {https://doi.org/10.1109/ESSCIR.2005.1541655},
  researchr = {https://researchr.org/publication/QuiquempoixDBBCMST05},
  cites = {0},
  citedby = {0},
  pages = {443-446},
  booktitle = {Proceedings of the 31st European Solid-State Circuits Conference, ESSCIRC 2005, Grenoble, France, 12-16 September 2005},
  editor = {Laurent Fesquet and Andreas Kaiser and Sorin Cristoloveanu and Michel Brillouët},
  publisher = {IEEE},
  isbn = {0-7803-9205-1},
}