Fast 32-bit digital multiplier

Kaamran Raahemifar, Majid Ahmadi. Fast 32-bit digital multiplier. In Proceedings of the 2001 8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001, Malta, September 2-5, 2001. pages 1413-1416, IEEE, 2001. [doi]

@inproceedings{RaahemifarA01a,
  title = {Fast 32-bit digital multiplier},
  author = {Kaamran Raahemifar and Majid Ahmadi},
  year = {2001},
  doi = {10.1109/ICECS.2001.957479},
  url = {https://doi.org/10.1109/ICECS.2001.957479},
  researchr = {https://researchr.org/publication/RaahemifarA01a},
  cites = {0},
  citedby = {0},
  pages = {1413-1416},
  booktitle = {Proceedings of the 2001 8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001, Malta, September 2-5, 2001},
  publisher = {IEEE},
  isbn = {0-7803-7057-0},
}