VLSI architecture and design for high performance adaptive video scaling

Arun Raghupathy, P. Hsu, K. J. Ray Liu, N. Chandrachoodan. VLSI architecture and design for high performance adaptive video scaling. In International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA. pages 406-409, IEEE, 1999. [doi]

@inproceedings{RaghupathyHLC99,
  title = {VLSI architecture and design for high performance adaptive video scaling},
  author = {Arun Raghupathy and P. Hsu and K. J. Ray Liu and N. Chandrachoodan},
  year = {1999},
  doi = {10.1109/ISCAS.1999.780028},
  url = {http://doi.ieeecomputersociety.org/10.1109/ISCAS.1999.780028},
  tags = {architecture, design},
  researchr = {https://researchr.org/publication/RaghupathyHLC99},
  cites = {0},
  citedby = {0},
  pages = {406-409},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA},
  publisher = {IEEE},
  isbn = {0-7803-5471-0},
}