Minimizing peak power in synchronous logic circuits - researchr publication authors

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Kambiz Rahimi. Minimizing peak power in synchronous logic circuits. In Hai Zhou, Enrico Macii, Zhiyuan Yan, Yehia Massoud, editors, Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007. pages 247-252, ACM, 2007. [doi]

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