Area and power efficient ECC for multiple adjacent bit errors in SRAMs

Kumar Rahul, Santosh Yachareni. Area and power efficient ECC for multiple adjacent bit errors in SRAMs. In 2020 IEEE International Conference on Consumer Electronics (ICCE), Las Vegas, NV, USA, January 4-6, 2020. pages 1-4, IEEE, 2020. [doi]

Abstract

Abstract is missing.