A Hardware Approach to Concurrent Error Detection Capability Enhancement in COTS Processors

Amir Rajabzadeh, Seyed Ghassem Miremadi. A Hardware Approach to Concurrent Error Detection Capability Enhancement in COTS Processors. In 11th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2005), 12-14 December, 2005, Changsha, Hunan, China. pages 83-90, IEEE Computer Society, 2005. [doi]

Abstract

Abstract is missing.