Low cost soft error hardened latch designs for nano-scale CMOS technology in presence of process variation

Ramin Rajaei, Mahmoud Tabandeh, Mahdi Fazeli. Low cost soft error hardened latch designs for nano-scale CMOS technology in presence of process variation. Microelectronics Reliability, 53(6):912-924, 2013. [doi]

@article{RajaeiTF13,
  title = {Low cost soft error hardened latch designs for nano-scale CMOS technology in presence of process variation},
  author = {Ramin Rajaei and Mahmoud Tabandeh and Mahdi Fazeli},
  year = {2013},
  doi = {10.1016/j.microrel.2013.02.012},
  url = {http://dx.doi.org/10.1016/j.microrel.2013.02.012},
  researchr = {https://researchr.org/publication/RajaeiTF13},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Reliability},
  volume = {53},
  number = {6},
  pages = {912-924},
}