A Low-Phase Noise, Low-Power PFD Circuit Using GDI and Pass Transistor Logic with PVT tolerance - researchr publication authors

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Dheeraj Singh Rajput, Bharat Choudhary, Archana Singhal, Dharmendar Boolchandani. A Low-Phase Noise, Low-Power PFD Circuit Using GDI and Pass Transistor Logic with PVT tolerance. In IEEE International Conference on Consumer Electronics, ICCE 2026, Dubai, United Arab Emirates, February 3-5, 2026. pages 1-5, IEEE, 2026. [doi]

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