A Dynamically Reconfigurable Video Compression Scheme Using FPGAs with Coarse-grain Parallelism

S. Ramachandran, S. Srinivasan 0001. A Dynamically Reconfigurable Video Compression Scheme Using FPGAs with Coarse-grain Parallelism. VLSI Design, 2002(2):521-528, 2002. [doi]

Abstract

Abstract is missing.