A Systolic Array Architecture for SVM Classifier for Machine Learning on Embedded Devices - researchr publication

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Srikanth Ramadurgam, Darshika G. Perera. A Systolic Array Architecture for SVM Classifier for Machine Learning on Embedded Devices. In IEEE International Symposium on Circuits and Systems, ISCAS 2023, Monterey, CA, USA, May 21-25, 2023. pages 1-5, IEEE, 2023. [doi]

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