Sundarrajan Rangachari, Jaiganesh Balakrishnan, Nitin Chandrachoodan. Scalable Low Power FFT/IFFT Architecture with Dynamic Bit Width Configurability. In 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems, Mumbai, India, January 5-9, 2014. pages 359-364, IEEE, 2014. [doi]
@inproceedings{RangachariBC14,
title = {Scalable Low Power FFT/IFFT Architecture with Dynamic Bit Width Configurability},
author = {Sundarrajan Rangachari and Jaiganesh Balakrishnan and Nitin Chandrachoodan},
year = {2014},
doi = {10.1109/VLSID.2014.68},
url = {http://dx.doi.org/10.1109/VLSID.2014.68},
researchr = {https://researchr.org/publication/RangachariBC14},
cites = {0},
citedby = {0},
pages = {359-364},
booktitle = {2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems, Mumbai, India, January 5-9, 2014},
publisher = {IEEE},
}