A. G. Rao, A. K. D. Dwivedi. Design of ESOP-RPLA Array Using DRG2 and DRG4 Gates Based on Reversible Logic Technology. In IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2016, Gwalior, India, December 19-21, 2016. pages 218-223, IEEE, 2016. [doi]
@inproceedings{RaoD16-4,
title = {Design of ESOP-RPLA Array Using DRG2 and DRG4 Gates Based on Reversible Logic Technology},
author = {A. G. Rao and A. K. D. Dwivedi},
year = {2016},
doi = {10.1109/iNIS.2016.058},
url = {https://doi.org/10.1109/iNIS.2016.058},
researchr = {https://researchr.org/publication/RaoD16-4},
cites = {0},
citedby = {0},
pages = {218-223},
booktitle = {IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2016, Gwalior, India, December 19-21, 2016},
publisher = {IEEE},
isbn = {978-1-5090-6170-9},
}