An On-Chip Signal Suppression Countermeasure to Power Analysis Attacks

Girish B. Ratanpal, Ronald D. Williams, Travis N. Blalock. An On-Chip Signal Suppression Countermeasure to Power Analysis Attacks. IEEE Trans. Dependable Sec. Comput., 1(3):179-189, 2004. [doi]

Authors

Girish B. Ratanpal

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Ronald D. Williams

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Travis N. Blalock

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