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A Scan-Based Lower-Power Testing Architecture for Modern Circuits

Jiann-Chyi Rau, Jia-Xiang Wang. A Scan-Based Lower-Power Testing Architecture for Modern Circuits. In International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2021, Hualien City, Taiwan, November 16-19, 2021. pages 1-2, IEEE, 2021. [doi]

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Jiann-Chyi Rau

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Jia-Xiang Wang

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