Jiann-Chyi Rau, Jia-Xiang Wang. A Scan-Based Lower-Power Testing Architecture for Modern Circuits. In International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2021, Hualien City, Taiwan, November 16-19, 2021. pages 1-2, IEEE, 2021. [doi]
@inproceedings{RauW21,
title = {A Scan-Based Lower-Power Testing Architecture for Modern Circuits},
author = {Jiann-Chyi Rau and Jia-Xiang Wang},
year = {2021},
doi = {10.1109/ISPACS51563.2021.9651069},
url = {https://doi.org/10.1109/ISPACS51563.2021.9651069},
researchr = {https://researchr.org/publication/RauW21},
cites = {0},
citedby = {0},
pages = {1-2},
booktitle = {International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2021, Hualien City, Taiwan, November 16-19, 2021},
publisher = {IEEE},
isbn = {978-1-6654-1951-2},
}