Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits

Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, Axel Jantsch. Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits. In 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France. pages 690-691, IEEE Computer Society, 2004. [doi]

@inproceedings{RaudvereSSJ04,
  title = {Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits},
  author = {Tarvo Raudvere and Ashish Kumar Singh and Ingo Sander and Axel Jantsch},
  year = {2004},
  url = {http://csdl.computer.org/comp/proceedings/date/2004/2085/01/208510690abs.htm},
  tags = {abstraction},
  researchr = {https://researchr.org/publication/RaudvereSSJ04},
  cites = {0},
  citedby = {0},
  pages = {690-691},
  booktitle = {2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2085-5},
}