Circuit to reduce Gate Induced Drain Leakage in CMOS output buffers

Hari Anand Ravi, Mayank Goel, Prasad Bhilawadi. Circuit to reduce Gate Induced Drain Leakage in CMOS output buffers. In Lorena Garcia, editor, 22nd International Conference on Very Large Scale Integration, VLSI-SoC, Playa del Carmen, Mexico, October 6-8, 2014. pages 1-5, IEEE, 2014. [doi]

@inproceedings{RaviGB14,
  title = {Circuit to reduce Gate Induced Drain Leakage in CMOS output buffers},
  author = {Hari Anand Ravi and Mayank Goel and Prasad Bhilawadi},
  year = {2014},
  doi = {10.1109/VLSI-SoC.2014.7004187},
  url = {http://dx.doi.org/10.1109/VLSI-SoC.2014.7004187},
  researchr = {https://researchr.org/publication/RaviGB14},
  cites = {0},
  citedby = {0},
  pages = {1-5},
  booktitle = {22nd International Conference on Very Large Scale Integration, VLSI-SoC, Playa del Carmen, Mexico, October 6-8, 2014},
  editor = {Lorena Garcia},
  publisher = {IEEE},
  isbn = {978-1-4799-6016-3},
}